free_xenheap_pages(d->shared_info,
get_order_from_shift(XSI_SHIFT));
- if ( iommu_enabled && (is_hvm_domain(d) || need_iommu(d)) ) {
+ if ( iommu_enabled && need_iommu(d) ) {
pci_release_devices(d);
iommu_domain_destroy(d);
}
if(!mfn_valid(mfn))
return;
- if ( iommu_enabled && (is_hvm_domain(d) || need_iommu(d)) ){
+ if ( iommu_enabled && need_iommu(d) ){
int i, j;
j = 1 << (PAGE_SHIFT-PAGE_SHIFT_4K);
for(i = 0 ; i < j; i++)
smp_mb();
assign_domain_page_replace(d, gpfn << PAGE_SHIFT, mfn,
ASSIGN_writable | ASSIGN_pgc_allocated);
- if ( iommu_enabled && (is_hvm_domain(d) || need_iommu(d)) ){
+ if ( iommu_enabled && need_iommu(d) ){
int i, j;
j = 1 << (PAGE_SHIFT-PAGE_SHIFT_4K);
for(i = 0 ; i < j; i++)
ept_sync_domain(d);
/* Now the p2m table is not shared with vt-d page table */
- if ( iommu_enabled && is_hvm_domain(d) && need_modify_vtd_table )
+ if ( iommu_enabled && need_iommu(d) && need_modify_vtd_table )
{
if ( p2mt == p2m_ram_rw )
{
&& (gfn + (1UL << page_order) - 1 > d->arch.p2m->max_mapped_pfn) )
d->arch.p2m->max_mapped_pfn = gfn + (1UL << page_order) - 1;
- if ( iommu_enabled && (is_hvm_domain(d) || need_iommu(d)) )
+ if ( iommu_enabled && need_iommu(d) )
{
if ( p2mt == p2m_ram_rw )
for ( i = 0; i < (1UL << page_order); i++ )
return 0;
}
-int amd_iommu_sync_p2m(struct domain *d)
-{
- unsigned long mfn, gfn;
- u64 iommu_l2e;
- struct page_info *page;
- struct hvm_iommu *hd;
- int iw = IOMMU_IO_WRITE_ENABLED;
- int ir = IOMMU_IO_READ_ENABLED;
-
- if ( !is_hvm_domain(d) )
- return 0;
-
- hd = domain_hvm_iommu(d);
-
- spin_lock(&hd->mapping_lock);
-
- if ( hd->p2m_synchronized )
- goto out;
-
- spin_lock(&d->page_alloc_lock);
-
- page_list_for_each ( page, &d->page_list )
- {
- mfn = page_to_mfn(page);
- gfn = get_gpfn_from_mfn(mfn);
-
- if ( gfn == INVALID_M2P_ENTRY )
- continue;
-
- iommu_l2e = iommu_l2e_from_pfn(hd->root_table, hd->paging_mode, gfn);
-
- if ( iommu_l2e == 0 )
- {
- spin_unlock(&d->page_alloc_lock);
- spin_unlock(&hd->mapping_lock);
- amd_iov_error("Invalid IO pagetable entry gfn = %lx\n", gfn);
- domain_crash(d);
- return -EFAULT;
- }
-
- set_iommu_l1e_present(iommu_l2e, gfn, (u64)mfn << PAGE_SHIFT, iw, ir);
- }
-
- spin_unlock(&d->page_alloc_lock);
-
- hd->p2m_synchronized = 1;
-
-out:
- spin_unlock(&hd->mapping_lock);
- return 0;
-}
-
void invalidate_all_iommu_pages(struct domain *d)
{
u32 cmd[4], entry;
int bdf = (bus << 8) | devfn;
int req_id = ivrs_mappings[bdf].dte_requestor_id;
- amd_iommu_sync_p2m(d);
-
if ( ivrs_mappings[req_id].unity_map_enable )
{
amd_iommu_reserve_domain_unity_map(
if ( (rc = hd->platform_ops->assign_device(d, bus, devfn)) )
goto done;
- if ( has_arch_pdevs(d) && !is_hvm_domain(d) && !need_iommu(d) )
+ if ( has_arch_pdevs(d) && !need_iommu(d) )
{
d->need_iommu = 1;
rc = iommu_populate_page_table(d);
if ( !iommu_enabled || !hd->platform_ops )
return;
- if ( !is_hvm_domain(d) && !need_iommu(d) )
+ if ( !need_iommu(d) )
return;
if ( need_iommu(d) )
if ( !iommu_enabled )
return;
- if ( !is_hvm_domain(d) && !need_iommu(d) )
+ if ( !need_iommu(d) )
return;
spin_lock(&d->event_lock);
u64 amd_iommu_get_next_table_from_pte(u32 *entry);
int amd_iommu_reserve_domain_unity_map(struct domain *domain,
unsigned long phys_addr, unsigned long size, int iw, int ir);
-int amd_iommu_sync_p2m(struct domain *d);
void invalidate_all_iommu_pages(struct domain *d);
/* device table functions */
#define is_hvm_domain(d) ((d)->is_hvm)
#define is_hvm_vcpu(v) (is_hvm_domain(v->domain))
-#define need_iommu(d) ((d)->need_iommu && !(d)->is_hvm)
+#define need_iommu(d) ((d)->need_iommu)
void set_vcpu_migration_delay(unsigned int delay);
unsigned int get_vcpu_migration_delay(void);